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This queue is for tickets about the Verilog-Perl CPAN distribution.

Report information
The Basics
Id: 26999
Status: rejected
Priority: 0/
Queue: Verilog-Perl
People
Owner: Nobody in particular
Requestors: nodine [...] cpan.org
Cc:
AdminCc:
Bug Information
Severity: Normal
Broken in: 2.373
Fixed in: (no value)
Attachments
no_newline.v

History Show all quoted text
  Tue May 08 11:28:00 2007 nodine [...] cpan.org - Ticket created
Subject: Verilog::Preproc requires newline at end of file
Verilog::Preproc returns an error %Error: ../testsuite/no_newline.v:1: EOF (missing return?) in define value because there is no newline at the end of file. One of the source verilog files in a common commercially licensed core has this issue. There should be some option that allows suppressing this error.
Subject: no_newline.v
Download no_newline.v
application/tkgate 14b

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  Tue May 08 11:37:01 2007 wsnyder [...] wsnyder.org - Correspondence added
The IEEE spec states in 19.3.1 that "The first newline not preceeded by a backslash shall end the macro text." Since their define never has a newline, their code is wrong. I don't want to add options to parse code that violates the spec and is also exceedingly uncommon (since I've only seen it once ever.) Sorry.
  Tue May 08 11:37:03 2007 The RT System itself - Status changed from 'new' to 'open'
  Tue May 08 11:37:04 2007 wsnyder [...] wsnyder.org - Status changed from 'open' to 'rejected'
  Tue May 08 11:41:02 2007 nodine [...] intrinsity.com - Correspondence added
Subject: Re: [rt.cpan.org #26999] Verilog::Preproc requires newline at end of file
Date: Tue, 08 May 2007 10:40:40 -0500
To: bug-Verilog-Perl [...] rt.cpan.org
From: Mark Nodine <nodine [...] intrinsity.com>
That's reasonable. I guess we should report the error to the company that produced the Verilog. Thanks.
  Tue May 08 11:41:03 2007 The RT System itself - Status changed from 'rejected' to 'open'
  Wed May 16 09:52:01 2007 wsnyder [...] wsnyder.org - Status changed from 'open' to 'rejected'