Skip Menu |

Preferred bug tracker

Please visit the preferred bug tracker to report your issue.

This queue is for tickets about the Verilog-Perl CPAN distribution.

Report information
The Basics
Id: 24248
Status: resolved
Priority: 0/
Queue: Verilog-Perl

People
Owner: Nobody in particular
Requestors: jetrull [...] sbcglobal.net
Cc:
AdminCc:

Bug Information
Severity: Important
Broken in: 2.361
Fixed in: (no value)



Subject: Netlist module converts "supply" statements to "wire"
"supply0" and "supply1" statements frequently appear in netlists to indicate nets that are connected to power supplies. Presently an input such as: supply1 Vdd; will be silently converted to: wire Vdd; on output, resulting in an undriven net. A patch is attached. Regards, Jeff Trull
Subject: supply01.diff
--- Verilog-Perl-2.361/Netlist/File.pm 2006-10-02 06:22:49.000000000 -0700 +++ Verilog-Perl-2.361-mrhack/Netlist/File.pm 2007-01-05 15:06:07.737060000 -0800 @@ -161,10 +161,14 @@ || $inout eq "supply0" || $inout eq "supply1" ) { my $net = $modref->find_net ($netname); + my $nettype = "wire"; + if ($inout =~ /^supply\d/) { + $nettype = $inout; + } $net or $net = $modref->new_net (name=>$netname, filename=>$self->filename, lineno=>$self->lineno, - simple_type=>1, type=>'wire', array=>$array, + simple_type=>1, type=>$nettype, array=>$array, comment=>undef, msb=>$msb, lsb=>$lsb, signed=>$signed, );
I think the proper fix is not to special case supply0/supply1, but to always pass the declaration type to the caller. Here's the patch I'll put in the next version. (Some tests change too; not included here.) =================================================================== --- Netlist/File.pm (revision 29737) +++ Netlist/File.pm (working copy) @@ -164,10 +164,11 @@ $net or $net = $modref->new_net (name=>$netname, filename=>$self->filename, lineno=>$self->lineno, - simple_type=>1, type=>'wire', array=>$array, + simple_type=>1, type=>$inout, array=>$array, comment=>undef, msb=>$msb, lsb=>$lsb, signed=>$signed, ); + $net->type($inout); # If it's already declared as in/out etc, mark the type $self->{_cmtref} = $net; } elsif ($inout =~ /(inout|in|out)(put|)$/) {